Journals / Transactions

( * : Corresponding author)

1. Istiaque Ahmed, Kentaroh Toyoda, Tadashi Nakano, et al. A Systematic Review on Blockchain-Enabled eKYC: Leveraging SSI and DID for Secure and Efficient Identity Verification. TechRxiv. October 07, 2024.
   DOI: 10.36227/techrxiv.172833152.28797164/v1

2. Quoc Duy Nam Nguyen, Hoang Viet Anh Le, Tadashi Nakano, Thi Hong Tran, “Wine quality assessment through lightweight deep learning: integrating 1D-CNN and LSTM for analyzing electronic nose VOCs signals,” Applied Computing and Informatics, DOI: 10.1108/ACI-10-2023-0098, March 1 2024. link

3. Istiaque Ahmed, Kai Fumimoto, Tadashi Nakano, Thi Hong Tran, “Blockchain-Empowered Decentralized Philanthropic Charity for Social Good,” Sustainability Journal,  Special Issue: Opportunities and Challenges of Blockchain in Achieving Sustainable Development Goals (SDGs)), Dec. 2023. Link

4. Tran, V.D.; Ata, S.; Thi Hong Tran*; Lam, D.K.; Pham, H.L. Blockchain-Powered Education: A Sustainable Approach for Secured and Connected University Systems. Sustainability 2023, 15, 15545. https://doi.org/10.3390/su152115545, link (IF = 3.9) 

5. Le Vu Trung Duong*, Hoai Luan Pham, Thi Hong Tran, and Y.Nakashima: “Flexible and Energy-efficient Crypto-Processor for Arbitrary Input Length Processing in Blockchain-based IoT Applications”, IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E107-A,No.3, DOI: 10.1587/transfun.2023CIP0013, 2023 Sept. 4th (2024), link

6. H. L. Pham*, T. H. Tran, V. T. Duong Le and N. Yasuhiko, “Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications,” in IEEE Design & Test, vol. 40, no. 5, pp. 15-25, Oct. 2023, doi: 10.1109/MDAT.2023.3276936. Link

7. Atsuki Koyama ,Van Chuong Tran, Manato Fujimoto ,Vo Nguyen Quoc Bao, and Thi Hong Tran*, “A Decentralized COVID-19 Vaccine Tracking System Using Blockchain Technology,” Journal of Cryptography 2023, 7(1), 13; https://doi.org/10.3390/cryptography7010013. Link

8. Van Duy Tran, Duc Khai Lam*, and Thi Hong Tran, “Hardware-Based Architecture for DNN Wireless Communication Models,” Journal of Sensors 2023, 23(3), 1302; https://doi.org/10.3390/s23031302. Link

9. H. L. Pham, T. H. Tran*, V. T. D. Le and Y. Nakashima, “Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator,” in IEEE Access, 2022, doi: 10.1109/ACCESS.2022.3181410, June 8th 2022. Link

10. H. L. Pham, T. H. Tran*, V. T. Duong Le and Y. Nakashima, “A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator,” in IEEE Access, vol. 10, pp. 11830-11845, 2022, doi: 10.1109/ACCESS.2022.3146148, Jan. 25th 2022. (rank: Q1, IF = 3.75) Link

11. V. T. Duong Le, T. H. Tran*, H. L. Pham, D. K. Lam and Y. Nakashima, “MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security,” in IEEE Access, vol. 9, pp. 168383-168396, doi: 10.1109/ACCESS.2021.3131558, Nov. 30th 2021, (rank: Q1, IF = 3.75) Link

12. Lam, D.K.; Le, V.T.D.; T.H. Tran. ”Efficient Architectures for Full Hardware Scrypt-Based Block Hashing System” Electronics Journal 2022, 11, 1068. https://doi.org/10.3390/electronics11071068 

13. T. H. Tran*, H. L. Pham, T. D. Phan and Y. Nakashima, “BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 10, pp. 4245-4258, Oct. 2021, doi: 10.1109/TCSI.2021.3102618. Link

14. Thi Hong Tran*, H. L. Pham and Y. Nakashima, “A High-Performance Multimem SHA-256 Accelerator for Society 5.0,” in IEEE Access, vol. 9, pp. 39182-39192, March 2021, DOI: 10.1109/ACCESS.2021.3063485. (ranking Q1, Impact factor = 3.75) (研究費: JST PRESTO 2020A031)  Link

15. H.L. Pham, Thi Hong Tran*, T.D. Phan, V.T.D. Le, D.K. Lam, Y. Nakashima, “15-Gbps Double SHA-256 Hardware Architecture with Compact Message Expander for Bitcoin Mining,” IEEE Access journal, vol. 8, pp: 139634 – 139646, DOI: 10.1109/ACCESS.2020.3012581, July 2020. (ranking Q1, Impact factor = 3.75) (研究費: JST PRESTO 2019A039 + KYODO-2020)  Link

16. D.L. Hoang, Thi Hong Tran*, Y. Nakashima, “A Low Complexity Join-Encryption-Modulation Method for IoT Sensor Transceivers,” Electronics Journal, 2020, 9(4), 663, DOI: 10.3390/electronics9040663, April 2020. (ranking Q2, Impact factor = 2.41) (研究費: KAKENHI 16K18105)  Link

17. Duc Phuc Nguyen*, Dinh Dung Le, Thi Hong Tran, Vo Nguyen Quoc Bao, “Hardware Architecture of Visible Light Communication Transmitter and Receiver for Beacon-based Indoor Positioning Systems,” REV Journal on Electronics and Communications, Vol. 9, No. 3, pp.30-44, Dec. 2019, link: https://www.rev-jec.org/index.php/rev-jec/article/view/234  ( 研究費: KAKENHI 16K18105 + KYODO-2018)  

18. Dinh-Dung Le*, Duc-Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima, “Log-Likelihood Ratio Calculation using 3-bit Soft-Decision for Error Correction in Visible Light Communication Systems,” Special section on Information Theory and Its Applications, IEICE trans. Fundamentals, Vol.E101-A, No.12, pp.2210-2212, Dec. 2018.  (ranking Q3, Impact Factor = 0.47) (研究費: KAKENHI 16K18105)  Link

19. Dinh-Dung Le*, Duc-Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima: “Joint Polar and Run-length Limited Decoding Scheme for Visible Light Communication Systems”, IEICE Communications Express Letter, Vol.7, Issue 1, pp.19-24, Jan. 2018.  (ranking Q3, Impact Factor = 1.4 ) (研究費: KAKENHI 16K18105 + KYODO-2018)  Link

20. Duc Phuc Nguyen*, Thi Hong Tran, Yasuhiko Nakashima: “A Multi-mode Error-Correction Solution based on Split-Concatenation for Wireless Sensor Nodes”, Journal of Communication, ISSN 1796-2021, vol. 12, no. 2, Feb. 2017, pp. 130-136, DOI: 10.10720/jcm.12.2.130-136. (研究費: KAKENHI 16K18105 + NAIST START-UP)  

21. Thi Hong Tran*, Yuhei Nagao, and Hiroshi Ochi，“Algorithm and Hardware Design of A 2D Sorter-based K-best MIMO Decoder,” EURASIP Journal on Wireless Communications and Networking.2014, 2014:93, DOI: 10.1186/1687-1499-2014-93, Jun. 2014.   (ranking Q2, Impact Factor = 1.83)　Link

22. Thi Hong Tran*, Leonardo Lanante JR., Yuhei Nagao, and Hiroshi Ochi, “Hardware Design of Multi Gbps RC4 Stream Cipher,” 2013 IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E96-A, No. 11, pp. 2120 – 2127, Nov. 2013.  (ranking Q3, Impact factor = 0.47)  Link